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<div class="title">XilFPGA APIs for Zynq UltraScale+ MPSoC<div class="ingroups"><a class="el" href="group__xilfpga__zynq__versal.html">XilFPGA APIs for Versal Adative SoC and Zynq UltraScale+ MPSoC</a></div></div>  </div>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga5e98e018395a91d666b1bf5322ead85a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xilfpga__zynq_m_p.html#ga5e98e018395a91d666b1bf5322ead85a">XFpga_GetPlConfigData</a> (<a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *InstancePtr, UINTPTR ReadbackAddr, u32 NumFrames)</td></tr>
<tr class="memdesc:ga5e98e018395a91d666b1bf5322ead85a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides functionality to read back the PL configuration data.  <a href="#ga5e98e018395a91d666b1bf5322ead85a">More...</a><br/></td></tr>
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<tr class="memitem:ga16b3f58643bb4ca44b5f76cb15ca3c27"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xilfpga__zynq_m_p.html#ga16b3f58643bb4ca44b5f76cb15ca3c27">XFpga_GetPlConfigReg</a> (<a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *InstancePtr, UINTPTR ReadbackAddr, u32 ConfigRegAddr)</td></tr>
<tr class="memdesc:ga16b3f58643bb4ca44b5f76cb15ca3c27"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides PL specific configuration register values.  <a href="#ga16b3f58643bb4ca44b5f76cb15ca3c27">More...</a><br/></td></tr>
<tr class="separator:ga16b3f58643bb4ca44b5f76cb15ca3c27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2f8e3aaa97c67aaaae6521f75f989e59"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__xilfpga__zynq_m_p.html#ga2f8e3aaa97c67aaaae6521f75f989e59">XFpga_InterfaceStatus</a> (<a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2f8e3aaa97c67aaaae6521f75f989e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides the status of the PL programming interface.  <a href="#ga2f8e3aaa97c67aaaae6521f75f989e59">More...</a><br/></td></tr>
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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">u32 XFpga_GetPlConfigData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>ReadbackAddr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>NumFrames</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function provides functionality to read back the PL configuration data. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the XFpga structure</td></tr>
    <tr><td class="paramname">ReadbackAddr</td><td>Address which is used to store the PL readback data.</td></tr>
    <tr><td class="paramname">NumFrames</td><td>The number of FPGA configuration frames to read.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XFPGA_SUCCESS, if successful</li>
<li>XFPGA_FAILURE, if unsuccessful</li>
<li>XFPGA_OPS_NOT_IMPLEMENTED, if implementation not exists. </li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd><ul>
<li>This API is not supported for the Versal platform. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_fpgatag.html#acd5464c8e6c66bf80aa0139efe016bb7">XFpgatag::ReadInfo</a>, and <a class="el" href="struct_x_fpgatag.html#af817a3d9e50e29ae60448178d216df29">XFpgatag::XFpga_GetConfigData</a>.</p>

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          <td class="memname">u32 XFpga_GetPlConfigReg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>ReadbackAddr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ConfigRegAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function provides PL specific configuration register values. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the XFpga structure</td></tr>
    <tr><td class="paramname">ReadbackAddr</td><td>Address which is used to store the PL Configuration register data.</td></tr>
    <tr><td class="paramname">ConfigRegAddr</td><td>Configuration register address as mentioned in the UG570.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XFPGA_SUCCESS if, successful</li>
<li>XFPGA_FAILURE if, unsuccessful</li>
<li>XFPGA_OPS_NOT_IMPLEMENTED, if implementation not exists. </li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd><ul>
<li>This API is not supported for the Versal platform. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_fpgatag.html#acd5464c8e6c66bf80aa0139efe016bb7">XFpgatag::ReadInfo</a>, and <a class="el" href="struct_x_fpgatag.html#a112c731b7c08c57308e95856658fae97">XFpgatag::XFpga_GetConfigReg</a>.</p>

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          <td class="memname">u32 XFpga_InterfaceStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__xilfpga__zynq__versal.html#ga2e73b67f19f7d94e00988c853ff4599b">XFpga</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function provides the status of the PL programming interface. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>Pointer to the XFpga structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Status of the PL programming interface</dd></dl>
<dl class="section note"><dt>Note</dt><dd><ul>
<li>This API is not supported for the Versal platform. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="struct_x_fpgatag.html#a6af355b88beaac6b872a53c13285514b">XFpgatag::XFpga_GetInterfaceStatus</a>.</p>

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